Method of making a molded interconnect device

ABSTRACT

A method of forming a molded interconnect device (MID) is provided. The method includes the steps of performing a molding stage, performing a circuit forming stage, and performing a plate stage. As a part of the molding stage, a palladium-catalyzed material is injection molded into a palladium-catalyzed substrate of a desired shape. As a part of the circuit forming stage, both a metallization step and a circuit patterning step are performed. As a part of the plating stage, both an electrolytic plating step and a circuit isolation step are performed.

RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No.16/315,244, filed on Jan. 4, 2019, which is a national stage ofInternational Application No. PCT/US2017/040721, filed Jul. 5, 2017,which claims priority to both U.S. Provisional Patent Application Ser.No. 62/359,365, filed on Jul. 7, 2016, and U.S. Provisional PatentApplication Ser. No. 62/435,305, filed on Dec. 16, 2016, the contents ofall of which are incorporated herein in their entireties.

BACKGROUND ART

Molded interconnect devices (“MIDs”) are three-dimensional manufacturedparts that typically include plastic components and electronic circuittraces. A plastic substrate or housing is created and electricalcircuits and devices are plated, layered, or implanted upon the plasticsubstrate. MIDs typically have fewer parts than conventionallymanufactured devices, which results in space and weight savings.Applications for MIDs include mobile telephones, automated tellermachines, steering wheel components for automobiles, RFID components,lighting, medical devices and many other consumer and/or commercialproducts.

Current processes for manufacturing MIDs include two-shot molding, laserdirect structuring technology (LDS), microscopic integrated processingtechnology (MIPTEC), and a laser developed additive technology. Each ofthese manufacturing processes have been known in the art for some time,yet each has its own drawbacks such that many individuals believe thatfurther improvements to manufacturing MIDs would be beneficial.

Two-shot molding involves the use of two separate plastic parts,typically one platable and one non-platable. The platable part forms thecircuitry, and the non-platable part fulfills mechanical functions andcompletes the molding. The two parts are fused together and circuits arecreated through use of electroless plating. The platable plastic ismetallized, while the non-platable plastic remains non-conductive.

LDS technology involves the steps of injection molding (using any of avariety of dielectric thermoplastic materials, including polyamide,polycarbonate, and liquid crystal polymer), laser activation of thethermoplastic material, and then metallization (electroless plating).The laser etches a wiring pattern onto the part and prepares it formetallization. With LDS, only a single thermoplastic material isrequired thereby making the molding step a one-shot process, andgenerally preferable as compared to the two-shot molding process.

MIPTEC technology, which is offered by Panasonic Corporation, involves amolding stage, a circuit forming stage, a plating stage, and a cuttingstage.

The molding stage includes injection-molding the intended shape using athermoplastic resin, such as polyphthalamide (PPA).

The circuit forming stage includes two steps, namely: (1) metallization;and (2) patterning. Thin copper film is formed in the base metallizationprocess (copper-strike). A laser is then used to remove the copper andoutline the circuit pattern, with the wavelength and exposure time ofthe laser optimized to achieve copper removal without damaging thesubstrate.

The plating stage includes two or three steps, namely: (1) electrolyticcopper plating; (2) optional soft etching; and (3) electrolytic nickeland gold plating. First, copper is electrically plated to form thecircuit pattern. Then, if desired, soft etching is applied to removeunnecessary copper-strike that was not removed by the laser in thecircuit forming stage. Finally, nickel and gold are plated on theelectrolytically-plated copper, forming the circuit pattern to helpprevent oxidation and corrosion.

An optional cutting stage then includes dicing the sheet form intoindividual MIDs.

Thus, MIPTEC technology, like LDS technology, has only a one-shotmolding process, but also provides MIDs which can be fine patterned andbare chip mounted.

The laser developed additive technology is similar to the MIPTECtechnology, but allows for other thermoplastic materials, such aspolyamide (PA), polycarbonate (PC) and acrylonitrile butadiene styrene(ABS) or liquid crystal polymer (LCP), to be used in the process. Likepolyphthalamide (PPA), however, these thermoplastic materials are alldielectric materials and require the separate and extra step of surfaceactivation treatment prior to the circuit forming stage. This extra stepadds both time and expense to these technologies.

MIPTEC and LDS technology processes have limitations, and in somecircumstances even impossibilities, in connection with plating featuresthat are not within a line-of-sight. For instance, as illustrated inFIGS. 25 and 26, a through-hole type via 60 is illustrated. Plating ofthe through-hole type via 60, as illustrated in FIG. 25, could not beachieved with a MIPTEC technology process because the chemical appliedto the surface of the plastic would also need to be applied to thevertical walls of the via 60. Plating of the through-hole type via 60,as illustrated in FIG. 26, could not be achieved with a LDS technologyprocess because vertical walls could not be achieved due to laseractivation required angle of incidence. FIG. 27 illustrates a differentline-of-sight feature 70, referred to herein as an overhang or anundercut, which likely is not possible with a MIPTEC and/or LDStechnology process.

SUMMARY

A first preferred embodiment of a manufacturing process includes thesteps of: injection molding a palladium-catalyzed material, such as, forexample, resins or epoxy molding compounds into a palladium-catalyzedsubstrate of a desired shape; forming a thin copper film over exteriorand exposed surfaces of the palladium-catalyzed substrate; ablating orremoving some of the copper film from the palladium-catalyzed substrateto provide first, second and optional third portions of the copper film;electrolytically plating each of the first, second and third portions ofthe copper film to form metallic-plated first, second and thirdportions; and ablating or removing the second portion in order toisolate the metallic-plated first portion from the metallic-plated thirdportion, where the metallic-plated first portion comprises a circuitportion of portion of a molded interconnect device (MID), and where themetallic-plated third portion comprises a Faraday cage portion of theMID.

A second preferred embodiment of a manufacturing process includes thesteps of: injection molding a palladium-catalyzed material, such as, forexample, resins or epoxy molding compounds into a palladium-catalyzedsubstrate of a desired shape; forming a thin copper film over exteriorand exposed surfaces of the palladium-catalyzed substrate; ablating orremoving some of the copper film from the palladium-catalyzed substrateto provide first, second and optional third portions of the copper film;electrolytic copper plating; soft etching to remove any unnecessarycopper; electrolytic nickel plating; electrolytic gold plating; andablating or removing the second portion in order to isolate themetallic-plated first portion from the metallic-plated third portion,where the metallic-plated first portion comprises a circuit portion ofthe MID, and where the metallic-plated third portion comprises a Faradaycage portion of the MID.

A third preferred embodiment of a manufacturing process includes thesteps of: injection molding a palladium-catalyzed material, such as, forexample, resins or epoxy molding compounds into a palladium-catalyzedsubstrate of a desired shape; forming a thin copper film over exteriorand exposed surfaces of the palladium-catalyzed substrate; ablating orremoving some of the copper film from the palladium-catalyzed substrateto provide ablated sections and first, second and optional thirdportions of the copper film; electrolytically plating each of the first,second and third portions of the copper film with copper plating;non-selectively adding solder resist; selectively removing the solderresist from parts of the first portion which will form contact pointsfor connection of the MID to an associated device or assembly, such as aprinted circuit board, and from the ablated sections; electrolyticallyplating the contact points with nickel plating and gold plating to formmetallic-plated first, second and third portions; and ablating orremoving the second portion in order to isolate the metallic-platedfirst portion from the metallic-plated third portion, where themetallic-plated first portion comprises a circuit portion of the MID,and where the metallic-plated third portion comprises a Faraday cageportion of the MID.

A fourth preferred embodiment of a manufacturing process includes thesteps of: injection molding a palladium-catalyzed material, such as, forexample, resins or epoxy molding compounds into a palladium-catalyzedsubstrate of a desired shape; forming a thin copper film over exteriorand exposed surfaces of the palladium-catalyzed substrate; ablating orremoving some of the copper film from the palladium-catalyzed substrateto provide ablated sections and first, second and optional thirdportions of the copper film; electrolytically plating each of the first,second and third portions of the copper film with copper plating, nickelplating and gold plating; non-selectively adding solder resist;selectively removing the solder resist from parts of the first portionwhich will form contact points for connection of the MID to anassociated device or assembly, such as a printed circuit board, and fromthe ablated sections; and ablating or removing the second portion inorder to isolate the metallic-plated first portion from themetallic-plated third portion, where the metallic-plated first portioncomprises a circuit portion of the MID, and where the metallic-platedthird portion comprises a Faraday cage portion of the MID.

Each manufacturing process results in an MID having apalladium-catalyzed substrate, a circuit portion, and an optionalFaraday cage portion, where the Faraday cage portion and the circuitportion may be isolated from one another.

These and other aspects and features of the disclosure are described infurther detail below.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a flow chart showing the steps of a first embodiment of aprocess of manufacturing a molded interconnect device (MID);

FIG. 2 is a flow chart showing the sub-steps of an electrolytic platingstep of the first embodiment of the manufacturing process;

FIG. 3 is a perspective view of a sheet;

FIG. 4 is a perspective view of one of the substrates separated from thesheet;

FIG. 5 is a top plan view of the substrate of FIG. 4;

FIG. 6 is a bottom plan view of the substrate of FIG. 4;

FIG. 7 is a cross-sectional view of a first assembly;

FIG. 8 is a perspective view of a second assembly;

FIG. 9 is a top plan view of the second assembly of FIG. 8;

FIG. 10 is a bottom plan view of the second assembly of FIG. 8;

FIG. 11 is a perspective view of a third assembly;

FIG. 12 is a top plan view of the third assembly of FIG. 11;

FIG. 13 is a bottom plan view of the third assembly of FIG. 11;

FIG. 14 is a cross-sectional view, shown in perspective, of the thirdassembly of FIG. 11, in accordance with an embodiment;

FIG. 15 is an enlarged view of a portion of FIG. 14;

FIG. 16 is a perspective view of a fourth assembly;

FIG. 17 is a flow chart showing the steps of a second embodiment of aprocess of manufacturing a molded interconnect device (MID);

FIG. 18 is a flow chart showing the steps of a third embodiment of aprocess of manufacturing a molded interconnect device (MID);

FIG. 19 is a partial perspective, cross-sectional view of the MID duringformation in accordance with the third embodiment;

FIG. 20 is a perspective view of the MID during formation in accordancewith the third embodiment;

FIG. 21 is a perspective view of the MID during formation in accordancewith the third embodiment;

FIG. 22 is a flow chart showing the steps of a fourth embodiment of aprocess of manufacturing a molded interconnect device (MID);

FIG. 23 is a partial perspective, cross-sectional view of the MID duringformation in accordance with the fourth embodiment;

FIG. 24 is a perspective view of the MID during formation in accordancewith the fourth embodiment;

FIGS. 25-27 illustrate cross-sectional views of prior art line-of-sightfeatures, such as through-hole type vias and overhangs or undercutswhich can be plated by any of the embodiments of the process.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present disclosure is directed to novel manufacturing processes 100,200, 300, 400 for forming a molded interconnect device (MID) 50. Themanufacturing processes 100, 200, 300, 400 are useful for the creationof MIDs, such as printed circuit boards, flex circuits, connectors,thermal management features, electromagnetic interference (EMI)shielding, high current conductors, radio frequency identification(RFID) apparatuses, antennas, wireless power, sensors, MEMS apparatuses,LEDs, microprocessors and memory, ASICs, passives, and other electricaland electro-mechanical apparatuses.

Attention is directed to FIGS. 1-16 relating to a first embodiment ofthe manufacturing process 100 used to form the MID 50. FIG. 1illustrates a flow chart depicting the steps of the manufacturingprocess 100. FIG. 2 illustrates a flow chart depicting the steps of asub-process of the manufacturing process 100. The manufacturing process100 includes a molding stage, a circuit forming stage, a plating stage,and a cutting stage.

The molding stage of the manufacturing process 100 advantageouslyincludes only a single step, which step will be referenced by referencenumeral 110. Step 110 is an injection-molding step where apalladium-catalyzed material (sometimes called palladium-doped in theart), such as, for example, resins or epoxy molding compounds, isinjection-molded in the form of a sheet 112 containing a plurality ofconnected substrates 114 (each formed in the intended shape) forproduction purposes. Each substrate 114 may be formed in a desiredthree-dimensional shape. In some embodiments, each substrate 114 isformed of the same three-dimensional shape. FIG. 3 illustrates theformation of the MID 50 after the completion of step 110, where thesheet 112 contains the plurality of substrates 114. FIGS. 4-6 illustratea singulated substrate 114. The material which is injection-molded is apalladium-catalyzed resin, but is intended to be inclusive of materialswhere the palladium (or any comparable material that does not need to besurface treated to accept metallization) is provided within, or infusedwithin, the material itself.

The circuit forming stage of the manufacturing process 100 includes twosteps, which steps will be referred to as steps 120 and 130.

Step 120 is a metallization step where a thin copper film 122 is formedover the exterior and exposed surfaces of the palladium-catalyzedsubstrates 114 to form a first assembly 123. Metallization step 120 iscommonly referred to as copper-striking. FIG. 7 illustrates theformation of the MID 50 after the completion of step 120, where thesubstrate 114 has the copper film 122 formed thereon (the first assembly123 is shown in cross-section for clarity to show the substrate 114).Sections 124 (shown with shading for clarity) which do not have thecopper film 122 formed thereon are where the substrate 114 is connectedto the adjacent substrate 114 in the sheet 112. Sections 124 areillustrative only and do not denote required locations for theconnection points.

Step 130 is a circuit patterning step where a laser (not shown) ablatesor removes portions of the copper film 122 from the first assembly 123to expose portions 131, 132 of the substrate 114 and form a secondassembly 133. This action defines and outlines a circuit pattern withinthe remaining copper film 122 to be provided for the MID 50. FIGS. 8-10illustrate the formation of the MID 50 after the completion of step 130,where the non-ablated/removed copper film 122 preferably includes first,second and optional and selectively sized/shaped third portions 134,136, 138 which are to be subject to the plating stage, as will bedescribed further below. The first portion 134 forms the circuitpattern, the second portion(s) 136 forms a bus portion(s) which connectsthe first portion 134 to the third portion(s) 138, if provided, and thethird portion(s) 138, if provided, is/are generally a Faraday cageportion (hereinafter, the second portion(s) 136 is referred to in thesingular, but more than one second portion 136 may be provided;hereinafter, the third portion(s) 138 is referred to in the singular,but more than one third portion 138 may be provided). The remainingsteps will be described and illustrated showing the third portion(s) 138with the understanding that the size/shape of the third portion(s) 138could be changed as desired, and also with the understanding that thethird portion(s) 138 could not be provided at all.

The plating stage of the manufacturing process 100 includes two steps,which steps will be referred to as steps 140 and 150.

Step 140 is an electrolytic plating step where a probe (not shown) isattached/connected to one of the first, second and third portions 134,136, 138 and electricity is run through the first, second and thirdportions 134, 136, 138 and desired metallic molecules from a desiredmetallic bath are drawn to and secured to the first, second and thirdportions 134, 136, 138, until the desired metallic plating of the first,second and third portions 134, 136, 138 is built up to the desiredthickness, thus forming metallic-plated first, second and third portions144, 146, 148 (it is to be understood that metallic-plated third portion148 will only be formed if third portion 138 is provided), therebyforming a third assembly 143. FIGS. 11-13 illustrate the formation ofthe MID 50 after the completion of step 140.

It is to be understood that the electrolytic plating step 140 caninclude the electrolytic plating of any metal(s) as desired. In apreferred embodiment, the electrolytic plating step 140 begins with astep 141 wherein a copper material is electrolytic plated onto thefirst, second and third portions 144, 146, 148 to form a copper plating173, followed by a step 171 wherein a nickel material is electrolyticplated onto the copper material 173 to form a nickel plating 174,followed by a step 172 wherein a gold material is electrolytic platedonto the nickel material 147 to form a gold plating 175, as illustratedin FIGS. 14 and 15.

Step 150 is a circuit isolation step where a laser (not shown) ablatesor removes the formed second (bus) portion(s) 136/146, beginning withsecond portion 146, and finishing with second portion 136, until thesurface of the substrate 114 is provided between the first and thirdportions 144, 148, thereby providing portions 152 of the substrate 114which are visible, and thereby forming a fourth assembly 153. Theablated sections 152 are connected to or continuous with the ablatedsections 132 such that the first portion 144 (namely the circuitpattern) is isolated from the third portion 148 (namely the Faraday cageportion). FIG. 16 illustrates the MID 50 that is formed after thecompletion of step 150.

Step 160 is a cutting step where the sheet 112 is diced in order toseparate each of the MIDs 50. The sheet 112 can be diced along sawstreets 162 (the saw streets 162 are not shown in FIGS. 4-16), therebyexposing the sections 124.

Either before or after step 160 of the manufacturing process 100 isperformed, one or more of the MIDs 50 can then be inspected, as desiredand in any of a number of known manners, to ensure that the MIDs 50 aresuitable for their intended use. The MIDs 50 may then be packaged andshipped. If desired, further electronic components may be electricallyconnected and secured to the first portion 144, namely the circuitportions, before the MIDs 50 are packaged and shipped. It is to beunderstood that the sheet 112 of MIDs 50 could be packaged and shippedprior to the cutting step 160 being performed.

Attention is directed to FIG. 17 relating to a second embodiment of themanufacturing process 200 used to form the MID 50. FIG. 17 illustrates aflow chart depicting the steps of the manufacturing process 200. Likemanufacturing process 100, manufacturing process 200 includes a moldingstage, a circuit forming stage, a plating stage, and a cutting stage.Manufacturing process 200 includes each of the same steps 110, 120, 130,140 (including steps 141, 142, 143), 150, 160 from manufacturing process100, but also includes a further step 245 that would preferably be apart of the plating stage. Step 245 is a soft etching step which wouldpreferably be performed after step 141, but before step 142. As a partof the soft etching step 245, soft etching would be applied in order toremove any unnecessary copper from areas that are not part of the first,second or third portions 144, 146, 148 of the MID 50 and to prevent anyunnecessary nickel and/or gold plating.

Attention is directed to FIGS. 18-21 relating to a third embodiment ofthe manufacturing process 300 used to form the MID 50. FIG. 18illustrates a flow chart depicting the steps of the manufacturingprocess 300. Like manufacturing process 100, manufacturing process 300includes a molding stage, a circuit forming stage, a plating stage, anda cutting stage. Manufacturing process 300 includes each of the samesteps 110, 120, 130, 141, 142, 143, 150, 160 from manufacturing process100, also includes steps 380, 381 after step 141 and before step 142.The soft etching step 245 may be included after step 141.

Step 380 is a solder resist addition step where solder resist 337 isadded non-selectively onto the entire assembly, including the copperplating 173 and the ablated sections 131, 132 as shown in FIG. 19. Step380 is a solder resist removal step where a laser (not shown) ablates orremoves the solder resist 337 from one or more sections 339 of thecopper plating 173 overlaying the first portion 134 which will formcontact point(s) for connection of the MID 50 to an associated device orassembly, such as a printed circuit board, as shown in FIG. 20. In someembodiments, the solder resist 337 on the ablated section 131, 132 andon the second portion 136 is also removed in step 380. In someembodiments, all of the solder resist 337 overlaying the ablatedsections 131, 132 is removed. In some embodiments, only a portion of thesolder resist 337 overlaying the ablated sections 131, 132 is removed.Alternatively, or additionally, during step 150, the solder resist 337on the second portion 136 and the solder resist 337 that remains on theablated sections 131, 132 that prevents the isolation of the firstportion 144 is removed. Thereafter, in steps 142 and 143, the nickelplating 174 and the gold plating 175 are only electrolytic plated ontothe sections 339 as shown in FIG. 21. This manufacturing process 300reduces the amount of precious metal used and provides for limitingsolder flow once the resulting MID 50 is soldered to another component.

Attention is directed to FIGS. 22-24 relating to a fourth embodiment ofthe manufacturing process 400 used to form the MID 50. FIG. 22illustrates a flow chart depicting the steps of the manufacturingprocess 400. Like manufacturing process 100, manufacturing process 400includes a molding stage, a circuit forming stage, a plating stage, anda cutting stage. Manufacturing process 300 includes each of the samesteps 110, 120, 130, 141, 142, 143, 150, 160 from manufacturing process100, also includes steps 490, 491 after step 143 and before step 150.The soft etching step 245 may be included after step 141.

Step 490 is a solder resist addition step where solder resist 337 isadded non-selectively onto the entire assembly, including the goldplating 175 and the ablated sections 131, 132 as shown in FIG. 23. Step491 is a solder resist removal step where a laser (not shown) ablates orremoves the solder resist 337 from one or more sections 439 of the goldplating 175 overlaying the first portion 134 which will form contactpoint(s) for connection of the MID 50 to an associated device orassembly, such as a printed circuit board, as shown in FIG. 24. In someembodiments, the solder resist 337 on the ablated section 131, 132 andon the second portion 136 is also removed in step 491. In someembodiments, all of the solder resist 337 overlaying the ablatedsections 131, 132 is removed. In some embodiments, only a portion of thesolder resist 337 overlaying the ablated sections 131, 132 is removed.Alternatively, or additionally, during step 150, the solder resist 337on the second portion 136 and the solder resist 337 that remains on theablated sections 131, 132 that prevents the isolation of the firstportion 144 is removed. This manufacturing process 400 provides forlimiting solder flow once the resulting MID 50 is soldered to anothercomponent.

The manufacturing processes 100, 200, 300, 400 of forming the MIDs 50are advantageous as compared to the prior-known MID manufacturingprocesses, especially as compared to the MIPTEC and laser developedadditive technology processes. More specifically, as theinjection-molded material is infused with palladium, it is thenunnecessary to perform any type of surface activation treatment to thesubstrate 114 of the type which is required in all prior-known MIDmanufacturing processes. Thus, the manufacturing processes 100, 200,300, 400 removes a step which is needed in all prior-known MIDmanufacturing processes, thereby saving both manufacturing costs andmanufacturing time.

MIPTEC and LDS technology processes also have limitations, and in somecircumstances even impossibilities, in connection with plating featuresthat are not within a line-of-sight. For instance, as illustrated inFIGS. 25 and 26, a through-hole type via 60 is illustrated. Plating ofthe through-hole type via 60, as illustrated in FIG. 25, could not beachieved with a MIPTEC technology process because the chemical appliedto the surface of the plastic would also need to be applied to thevertical walls of the via 60. Plating of the through-hole type via 60,as illustrated in FIG. 26, could not be achieved with a LDS technologyprocess because vertical walls could not be achieved due to laseractivation required angle of incidence. FIG. 27 illustrates a differentline-of-sight feature 70, referred to herein as an overhang or anundercut, which likely is not possible with a MIPTEC and/or LDStechnology process. The through-hole type vias 60 and overhang/undercut70 of FIGS. 25-27, however, can be easily plated with the manufacturingprocesses 100, 200, 300, 400 described and illustrated herein.

Furthermore, it has been determined that the manufacturing processes100, 200, 300, 400 provide for improved plating adhesion as compared tothe prior-known MID manufacturing processes, thereby making the MIDs 50formed from the manufacturing processes 100, 200, 300, 400 more robustand reliable than the MIDs formed from the prior-known MID manufacturingprocesses.

Advantageously, each of the manufacturing processes 100, 200, 300, 400may provide an MID 50 having a Faraday cage configuration, where thethird portions 148 provide the Faraday cage configuration which isuseful in providing better EMI shielding for any packaged integratedcircuit application. To aid in the provision of the Faraday cageconfiguration, each substrate 114 provided in the sheet 112 may have oneor more vias (not shown) formed along saw street, namely where the sheet112 is diced during step 160 to provide the individual MIDs 50. Thesevias allow for the metallization and electrolytic plating, of steps 120and 140/140 a, respectively, of all sides of the MIDs 50. It is to beunderstood that the size/shape of the Faraday cage configuration, ifprovided, may vary as desired.

All references, including publications, patent applications, andpatents, cited herein are hereby incorporated by reference to the sameextent as if each reference were individually and specifically indicatedto be incorporated by reference and were set forth in its entiretyherein.

The use of the terms “a” and “an” and “the” and “at least one” andsimilar referents in the context of describing the disclosure(especially in the context of the following claims) are to be construedto cover both the singular and the plural, unless otherwise indicatedherein or clearly contradicted by context. The use of the term “at leastone” followed by a list of one or more items (for example, “at least oneof A and B”) is to be construed to mean one item selected from thelisted items (A or B) or any combination of two or more of the listeditems (A and B), unless otherwise indicated herein or clearlycontradicted by context. The terms “comprising,” “having,” “including,”and “containing” are to be construed as open-ended terms (i.e., meaning“including, but not limited to,”) unless otherwise noted. Recitation ofranges of values herein are merely intended to serve as a shorthandmethod of referring individually to each separate value falling withinthe range, unless otherwise indicated herein, and each separate value isincorporated into the specification as if it were individually recitedherein. All processes described herein can be performed in any suitableorder unless otherwise indicated herein or otherwise clearlycontradicted by context. The use of any and all examples, or exemplarylanguage (e.g., “such as”) provided herein, is intended merely to betterilluminate the disclosure, and does not pose a limitation on the scopeof the disclosure unless otherwise claimed. No language in thespecification should be construed as indicating any non-claimed elementas essential to the practice of the disclosure.

Preferred embodiments of this disclosure are described herein, includingthe best mode known to the inventors for carrying out the disclosure.Variations of those preferred embodiments may become apparent to thoseof ordinary skill in the art upon reading the foregoing description. Theinventors expect skilled artisans to employ such variations asappropriate, and the inventors intend for the disclosure to be practicedotherwise than as specifically described herein. Accordingly, thisdisclosure includes all modifications and equivalents of the subjectmatter recited in the claims appended hereto as permitted by applicablelaw. Moreover, any combination of the above-described elements in allpossible variations thereof is encompassed by the disclosure unlessotherwise indicated herein or otherwise clearly contradicted by context.

1. A method of forming a molded interconnect device (MID), the methodcomprising the steps of: a) performing a molding stage, wherein apalladium-catalyzed material is injection molded into apalladium-catalyzed substrate of a desired shape; b) performing acircuit forming stage, wherein b1) a metallization step is performed,and b2) a circuit patterning step is performed; and c) performing aplating stage, wherein c1) an electrolytic plating step is performed,and c2) a circuit isolation step is performed to provide the MID.
 2. Themethod as defined in claim 1, wherein the metallization step of step b1)comprises forming a thin copper film over an exposed surface of thepalladium-catalyzed substrate.
 3. The method as defined in claim 1,wherein the circuit pattering step of step b2) comprises removing someof the copper film from the palladium-catalyzed substrate to providefirst and second portions of the copper film which are separated fromone another.
 4. The method as defined in claim 3, wherein the removal ofsome of the copper film in step b2) is performed by a laser.
 5. Themethod as defined in claim 3, wherein the at least first and secondportions of the copper film provided in step b2) are separated from oneanother by at least one exposed portion of the palladium-catalyzedsubstrate.
 6. The method as defined in claim 3, wherein the electrolyticplating step of step c1) comprises electrolytic copper plating,electrolytic nickel plating, and electrolytic gold plating.
 7. Themethod as defined in claim 3, wherein the electrolytic plating step ofstep c1) comprises electrolytically plating the first portion of thecopper film to form a metallic-plated first portion.
 8. The method asdefined in claim 7, wherein the current isolation step of step c2)comprises removing the second portion of the copper film.
 9. The methodas defined in claim 8, wherein the removal of the second portion of thecopper film in step c2) is performed by a laser.
 10. The method asdefined in claim 8, wherein the removal of the second portion of thecopper film in step c2) is performed by soft etching.
 11. The method asdefined in claim 8, wherein step c) further comprises steps c3) and c4),wherein in step c3) a solder resist addition step is performed, whereinin step c4) a solder resist removal step is performed, and wherein stepc4) is performed after step c3) is performed.
 12. The method as definedin claim 11, wherein steps c3) and c4) are performed before step c2) isperformed.
 13. The method as defined in claim 3, wherein the circuitpatterning step of step b2) further provides a third portion of thecopper film which separates the first portion of the copper film fromthe second portion of the copper film, the third portion of the copperfilm connecting the first portion of the copper film to the secondportion of the copper film.
 14. The method as defined in claim 13,wherein the first portion of the copper film forms a circuit patter,wherein the second portion of the copper film is a Faraday cage portion,and wherein the third portion of the copper film is a bus portion. 15.The method as defined in claim 13, wherein the electrolytic plating stepof step c1) comprises electrolytically plating the first, second andthird portions of the copper film to form metallic-plated first, secondand third portions.
 16. The method as defined in claim 15, wherein thecurrent isolation step of step c2) comprises removing themetallic-plated third portion to electrically isolate themetallic-plated first portion from the metallic-plated third portion.17. The method as defined in claim 16, wherein the removal of themetallic-plated third portion in step c2) is performed by a laser. 18.The method as defined in claim 16, wherein the removal of themetallic-plated third portion in step c2) is performed by soft etching.19. The method as defined in claim 16, wherein step c) further comprisessteps c3) and c4), wherein in step c3) a solder resist addition step isperformed, wherein in step c4) a solder resist removal step isperformed, and wherein step c4) is performed after step c3) isperformed.
 20. The method as defined in claim 19, wherein steps c3) andc4) are performed before step c2) is performed.
 21. A method of forminga molded interconnect device (MID), the method comprising the steps of:a) injection molding a palladium-catalyzed material into apalladium-catalyzed substrate of a desired shape; b) forming a thincopper film over exposed surfaces of the palladium-catalyzed substrate;c) removing some of the copper film from the palladium-catalyzedsubstrate to provide first and second portions of the copper film and atleast one exposed portion of the palladium-catalyzed substrate, thefirst and second portions of the copper film being separated from oneanother by the at least one exposed portion of the palladium-catalyzedsubstrate; d) electrolytically plating the first portion of the copperfilm to form a metallic-plated first portion; and e) removing the secondportion of the copper film to provide the MID.
 22. A method of forming amolded interconnect device (MID), the method comprising the steps of: a)injection molding a palladium-catalyzed material into apalladium-catalyzed substrate of a desired shape; b) forming a thincopper film over exposed surfaces of the palladium-catalyzed substrate;c) removing some of the copper film from the palladium-catalyzedsubstrate to provide first, second and third portions of the copperfilm, the second portion of the copper film connecting the first portionof the copper film to the third portion of the copper film; d)electrolytically plating the first, second and third portions of thecopper film to form metallic-plated first, second and third portions;and e) removing the metallic-plated second portion in order to isolatethe metallic-plated first portion from the metallic-plated third portionto provide the MID.